Semiconductor device fabrication involves using a number of fabrication processes to build a desired device. Generally, a semiconductor device is fabricated on a semiconductor material referred to as a substrate by forming layers or components, selectively patterning formed layers, and selectively implanting dopants into layers and/or the substrate in order to achieve desired operational characteristics.
A typical process for forming a layer on a semiconductor device involves placing the device in a multi-zone furnace, supplying a deposition source material (a gas), raising the furnace to a selected temperature for a selected period of time, and setting pressure at a suitable value, thereby causing deposition material to deposit on the device thereby forming the desired layer with a selected thickness.
Demand for semiconductor devices results in continuous demands for reduction in device and/or feature sizes as well as reductions in permitted tolerances in formed layers. One known issue with regard to multi-zone furnace deposition processes is that different zones or portions of the furnace can have different temperatures thereby resulting in varied deposition rates, which in turn lead to variations in layer thicknesses. As permitted tolerances continue to shrink, such variations in thicknesses that occur in multi-zone furnace based deposition processes can become unacceptable. Some conventional mechanisms have been employed to provide a tighter control of deposition rate. However, these conventional mechanisms are based on gas flow and the like and can negatively impact the stoichiometry of the devices being fabricated.
What is needed are systems and methods that improve uniformity in layer thicknesses for multi-zone furnace based depositions.